The figures Li presented

April Li, TSMC's AI and high-performance computing business development director, spoke at the IC forum of SEMICON Taiwan 2026 and said those who build the most integrated systems will lead. Li described inference as having stopped being a low-overhead task and as the main driver of system growth. The figures Li presented put global inference token volume at nearly 500 times its 2022 level.[1]

The figures Li presented put data movement at up to 60 per cent of typical system activity and AI accelerator utilisation below 40 per cent. Those two shares sit beside the nearly 500-fold rise in global inference token volume since 2022. Token volume is a multiple of its 2022 level; data movement is a share of typical system activity; utilisation is a share of the accelerator.[1]

Data movement and low utilisation

TSMC is developing its 3DFabric platform, which covers SoIC 3D stacking and CoWoS packaging, and COUPE for optical data transmission, because infrastructure has to combine computing, memory, interconnects, storage and power management across several levels. The figures Li presented put data movement at up to 60 per cent of typical system activity and AI accelerator utilisation below 40 per cent, so the constraint Li is pointing to is that path. An alternative is that utilisation below 40 per cent may come from the mix of inference work, in which case 3DFabric and COUPE may leave that share where it is.[1]

Li added that by 2030 AI packages could pass the 1 trillion transistor mark. TSMC is developing 3DFabric and COUPE for that load. The transistor mark is a packaging figure Li attached to 2030; utilisation below 40 per cent remains the share Li presented.[1]

Packages, transistors and 2030

Li added that by 2030 AI packages could pass the 1 trillion transistor mark. If TSMC's 3DFabric platform, covering SoIC 3D stacking and CoWoS packaging, and COUPE for optical data transmission proceed as Li described, the check by the end of 2030 is whether an AI package is reported to pass the 1 trillion transistor mark. A utilisation or data-movement share published with a named workload is a separate check.[1]