Marvell’s new Structera X expands shared memory for AI inference
Marvell has announced a second generation of its Structera X memory expansion controllers, moving from four memory channels to six. The design targets inference and recommendation workloads, including memory demands from longer model contexts. Host sharing, inline compression and error protection are part of the architecture. Sampling of the new controllers is planned for the first quarter of 2027.
Artificial Intelligence··Morning
Structera X moves from four channels to six
Marvell announced its second-generation Structera X memory expansion controllers on October 12. The new design moves from four memory channels in the earlier generation to six, targeting AI inference in cloud and hyperscale datacenters. The product family follows the original Structera design introduced in July 2024. Its current development is an expanded memory architecture for model-serving workloads, rather than a reported result from an operating customer system.[1], [2]
The controllers use Compute Express Link, or CXL, a connection technology for memory expansion. Marvell identifies language-model inference and deep-learning recommendation models among the intended workloads. For longer contexts, it points to growth in the key-value caches that models use during operation. Recommendation systems also need memory for embedding tables. These are the memory demands identified in the company’s intended workloads for the new controllers.[1]
Hosts share capacity through the controller
Connections to up to four hosts are designed to let computing systems share memory capacity rather than dedicate the controller to one machine. The architecture therefore includes capacity sharing alongside the expanded channel arrangement. Marvell positions it for operators increasing the scale of inference clusters, where memory bandwidth and available capacity are among the constraints it identifies. The announced host-sharing capability describes how the controller connects within that infrastructure.[1]
LZ4 compression is applied inline, in the memory path. Compression and decompression are part of the controller’s operation rather than separate product announcements. Marvell also describes encryption and other security components. Its StructGuard features cover error correction and resilience against dynamic random-access memory, or DRAM, failures. Those functions sit alongside capacity and connectivity in the second-generation design.[1]
Sampling is planned for early 2027
Marvell says the new generation builds on its existing software stack and ecosystem integrations. AMD, Arm, Alibaba, Meta, Samsung and SK hynix are among the companies supplying collaboration statements. The earlier Structera X controllers are already shipping to hyperscalers. Sampling of the new generation is planned for the first quarter of 2027. The announcement and demonstration introduce the design before that sampling stage; wider deployment follows its own development process.[1]
