Nvidia puts 3.5 billion dollars into MediaTek for NVLink Fusion
Nvidia has invested 3.5 billion dollars in convertible bonds issued by MediaTek. MediaTek is to adopt NVLink Fusion so customers can take custom XPU designs into rack-scale systems. The bundle includes an interconnect chiplet, NVLink-C2C and NVHBM memory. TSMC's April Li told SEMICON Taiwan 2026 that data movement takes up to 60 per cent of typical system activity and that AI accelerator utilisation sits below 40 per cent. ChangXin Memory Technologies has begun small-volume HBM3E production, unconfirmed by the company and one generation behind HBM4.
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Convertible bonds and NVLink Fusion
Nvidia said it has invested 3.5 billion dollars in convertible bonds issued by MediaTek. The two companies describe three areas of work: AI infrastructure through the NVLink Fusion ecosystem, further generations of the RTX Spark and DGX Spark computer chips that pair Nvidia GPUs with MediaTek systems-on-chip, and platforms for software-defined vehicles. MediaTek is to adopt NVLink Fusion so its customers can take custom XPU designs into NVLink-connected, rack-scale systems. NVLink Fusion bundles an interconnect chiplet, the NVLink-C2C link between XPUs and Nvidia Rosa CPUs, and NVHBM memory, offered as a prequalified base for multi-die accelerator designs. Jensen Huang said the partnership brings Nvidia accelerated computing to new markets. MediaTek chief executive Rick Tsai said the investment strengthens work spanning cloud infrastructure, local computing and automotive.[1]
Data movement and utilisation below 40 per cent
April Li, TSMC's AI and high-performance computing business development director, speaking at the IC forum of SEMICON Taiwan 2026, said those who build the most integrated systems will lead. Li described inference as having stopped being a low-overhead task and as the main driver of system growth. The figures Li presented put global inference token volume at nearly 500 times its 2022 level, data movement at up to 60 per cent of typical system activity, and AI accelerator utilisation below 40 per cent. Li said infrastructure has to combine computing, memory, interconnects, storage and power management across several levels, and noted that TSMC is developing its 3DFabric platform, which covers SoIC 3D stacking and CoWoS packaging, and COUPE for optical data transmission.[2]
Small-volume HBM3E, a generation behind HBM4
ChangXin Memory Technologies has entered small-quantity HBM3E production, according to a claim relayed from The Information and not confirmed by the company. HBM3E sits one generation behind the HBM4 that Samsung, SK Hynix and Micron already ship in volume. CXMT is put three to five years behind the leaders technically, with yield at about 25 per cent as of June. Alibaba's T-Head unit and Cambricon are described as testing the memory. HBM is the memory tier that US export restrictions target most directly for Chinese AI accelerators. CXMT raised 8.6 billion dollars in a Shanghai listing whose prospectus named no HBM project.[3]
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